1. Field of the Invention
The present invention relates to circuit boards used in electronic apparatuses such as information processing devices and wireless communications devices, and particularly relates to the structure of a circuit board for providing characteristic impedance matching in pattern-overlap areas, interlayer-connecting blind vias, buried vias, through-hole vias, and the like.
2. Description of the Background Art
Along with the multilayering of circuit boards in recent years, the distance between signal transmission lines has become shorter. Meanwhile, along with increase in signal speed, the necessity for impedance matching at high frequencies has become more pronounced.
As shown in FIG. 8, Japanese Laid-Open Patent Publication No. 2010-212439 discloses a circuit board 61 that includes a ground layer 65 and signal transmission lines 63a and 63b disposed on the ground layer 65 via an electrically insulating layer 62, and in which a shield layer 67 made of an electrically conductive material is formed on an electrically insulating layer 64 that covers the signal transmission lines 63a and 63b on their opposite side from the ground layer 65. Here, an opening 67a where no shield layer 67 is provided is formed on a portion of the electrically insulating layer 64 opposing the signal transmission lines 63a and 63b for which control of the characteristic impedance is required. In addition, in cases where the signal transmission lines 63a and 63b are a pair of differential signal transmission lines (paired lines) through which differential transmission takes place, given that the inter-linear separation between the paired lines is S, the distance U between either of the outer sides of the paired lines at the position of the inter-linear separation S, and the edge 67b of the opening in the shield layer 67 is established to be in the range 3S≦U≦20S. In FIG. 8, reference numeral 66 indicates an electrically insulating layer.
In the circuit board described in Japanese Laid-Open Patent Publication No. 2010-212439, the characteristic impedances of the paired lines are defined by the distance between the signal transmission lines 63a and 63b, and the ground layer 65 (the thickness t of the electrically insulating layer 62), and by the line widths w of the signal transmission lines 63a and 63b. 
In addition, Japanese Laid-Open Patent Publication No. 2005-197720 proposes a circuit board in which a pattern for impedance matching is provided around a via. Specifically, as shown in FIG. 9, in a circuit board 80 in Japanese Laid-Open Patent Publication No. 2005-197720, among a plurality of metal layers 82, 83, 84, 86, 87, and 89, dual metal layers are provided as high-frequency signal layers 86 and 87 for high-frequency signal transmission, and single metal layers are provided as ground layers 83 for providing a ground to the other metal layers. The circuit board 80 includes at least one via 90 formed so as to extend through the circuit board 80, and connecting the high-frequency signal layers 86 and 87 to each other, and includes impedance matching holes 85 formed so as to extend through the ground layers 83, and providing a path through which the via 90 extends. The spacing distance between the via 90 and the ground layers 83 is appropriately adjusted by the impedance matching holes 85 to adjust the capacitance, thereby providing impedance matching between the high-frequency signal layers 86 and 87 in the circuit board 80 when a high-frequency signal is transmitted. In FIG. 9, reference numeral 81 indicates an electrically insulating layer, and reference numeral 88 indicates a plating layer.
However, in the configuration of the circuit board described in Japanese Laid-Open Patent Publication No. 2010-212439, due to high-density wiring, the shield layer (shield pattern) 67 overlaps the signal transmission lines 63a and 63b defined with respect to the ground layer 65, resulting in an impedance mismatching state.
In addition, with the configuration of the multilayer circuit board described in Japanese Laid-Open Patent Publication No. 2005-197720, the configuration is complicated, and proves to be in an impedance mismatching state due to the influence of signal lines, such as signal pads 84, in layers other than the ground layer 83.